Computer system performance may be highly dependent on associated memory system operational efficiency. For example, processing that stalls when data is unavailable can render results at an unacceptably slow rate.
Many memory systems have been designed to support a fixed data bus width, with an implicit fixed data processing bandwidth. However, different applications may be able to use a variety of memory access data widths, such as 32 bits, 64 bits, and 128 bits, among others. As a result, there may be a disparity between the number of data bits available from memory and the number of data bits sought by the processor when executing a particular application. If the available bandwidth is too small, extra memory cycles may be required to process a given amount of data. If the available bandwidth is too large, the existing memory capacity may not be used efficiently.